The complex mechanisms and impressive learning capabilities of the human brain inspire the search for ever more efficient neural network models. Investigating the specific nature of biological neural networks in accelerated simulations with hundreds of millions of synapses, however, pushes even the most sophisticated systems to their limits. At the same time, the inherent chaotic nature of spiking networks and their typically distributed simulation complicates reproducibility, which is a major concern in both research and engineering. With HPC systems incrementally surpassing biological real-time in the simulation of neuroscience networks of significant size and complexity, novel computing architectures are required to reach disruptive speed-ups while assuring determinism and providing flexibility for continuous adaptations to new insights from neuroscience.To this end, we developed the neuroAIx FPGA cluster, based on off-the-shelf AMD/Xilinx FPGAs. It integrates a proprietary ultra-low-latency communication architecture and a custom short-range synchronization algorithm that brings worst-case source-to-destination spike latency down to 2 microseconds. Together with a latency-hiding memory-prefetch procedure, it enables deterministic simulations of the widely-used cortical microcircuit model, with nearly 80k neurons and 300M synapses, with an acceleration factor of 20x compared to biological real-time. This surpasses all existing systems, outperforming non-FPGA platforms by 10x, while providing the flexibility needed to explore neuro-inspired algorithms in the future.
